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Rev 0; 10/07
3.3V 26-Channel, Three-Stateable Transmission Gate
General Description
The DS3690 is a 26-channel, three-stateable transmission gate designed for transparent digital signal transfer when enabled and fast-gated bus isolation when the device is disabled. Each of the 26 independent channels can be used for input, output, or I/O signal applications, with a typical signal propagation delay of less than 10ns. Using the logic-control input, all channels can be simultaneously enabled for bus transmission or forced to a high-impedance condition to isolate a critical component on that bus. The DS3690 operates on a single 3.3V (typical) power supply and is available in a space-saving 56-pin leadfree TQFN package. 26 Bidirectional Channels Low Propagation Delay (< 10ns typ) High-Speed On/Off Time (< 20ns typ) 2.7V to 3.6V Supply Wide Temperature Range: -55C to +85C TQFN Package (5mm x 11mm x 0.8mm)
Features
DS3690
Applications
POS Terminals PIN Pads Cryptographic Processors Gaming Lottery Terminals Industrial Controls and Monitoring
PART DS3690T+ DS3690T+TRL
Ordering Information
TEMP RANGE -55C to +85C -55C to +85C PIN-PACKAGE 56 TQFN 56 TQFN
+Denotes a lead-free package. TRL = Tape and reel.
Pin Configuration
CH01B CH02B CH03B CH04B CH05B CH06B CH07B CH08B CH09B CH10B CH11B CH12B CH13B CH14B CH15B CH16B CH17B CH18B CH19B CH19A CH20B 28 CH21B 27 CH22B 26 CH23B 25 GND 24 VCC 23 CH23A EXPOSED PAD (ON BOTTOM) 22 CH22A 21 CH21A 2 CH02A 3 CH03A 4 CH04A 5 CH05A 6 CH06A 7 CH07A 8 CH08A 9 CH09A 10 11 12 13 14 15 16 17 18 19 20 CH10A CH11A CH12A CH13A CH14A CH15A CH16A CH17A CH18A CH20A
TOP VIEW
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 CH24B 49 CH25B 50 CH26B 51 CE 52 GND 53 CH26A 54 CH25A 55 CH24A 56 + 1 CH01A
DS3690
TQFN (5mm x 11mm x 0.8mm)
Typical Operating Circuit appears at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
3.3V 26-Channel, Three-Stateable Transmission Gate DS3690
ABSOLUTE MAXIMUM RATINGS
Voltage Range on Any Pin Relative to Ground......-0.5V to +6.0V Operating Temperature Range ...........................-55C to +85C Storage Temperature Range .............................-55C to +125C Soldering Temperature...................Refer to IPC/JEDEC J-STD-020
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
(TA = -55C to +85C)
PARAMETER Supply Voltage Input Logic 1 Input Logic 0 SYMBOL VCC VIH VIL (Note 1) (Note 1) (Note 1) CONDITIONS MIN 2.7 0.7 x VCC -0.3 TYP 3.3 MAX 3.6 VCC + 0.3 0.3 x VCC UNITS V V V
DC ELECTRICAL CHARACTERISTICS
(VCC = +2.7V to +3.6V, TA = -55C to +85C, unless otherwise noted.)
PARAMETER Standby Current Input Leakage Current (CE) I/O Leakage Current SYMBOL ICC II I IO CE = CH1 CE = VIH CONDITIONS CH26 = VCC, IOUT = 0mA VIN = 0V to VCC, TA = +25C MIN -0.1 -1.0 TYP MAX 1 +0.1 +1.0 UNITS A A A
AC ELECTRICAL CHARACTERISTICS
(VCC = +2.7V to +3.6V, TA = -55C to +85C, unless otherwise noted.)
PARAMETER Propagation Delay (A to B or B to A) Chip Enable to Output Valid Chip Enable to Output Deselect Input to CE Setup Time Skew Between Channels SYMBOL t PD tCEV tCEZ t IS tS CONDITIONS CE = VIL (Note 2) (Notes 2, 3) (Notes 2, 3) (Note 4) (Notes 5, 6) 0 1 MIN TYP MAX 10 20 20 UNITS ns ns ns ns ns
AC TEST CONDITIONS
Input Pulse Levels: Input Pulse Rise and Fall Times: Input and Output Timing Reference Level: Output Load: VIL = 0.0V, VIH = 2.7V 5ns VCC/2 CL (100pF)
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3.3V 26-Channel, Three-Stateable Transmission Gate
CAPACITANCE
(TA = +25C)
PARAMETER Input Capacitance (CE) I/O Capacitance SYMBOL CIN CIO CONDITIONS Not production tested Not production tested MIN TYP 5 8 MAX UNITS pF pF
DS3690
Note 1: All voltages referenced to ground. Note 2: Typical waveform shown is labeled CHxxA (input) to CHxxB (output), and is identical in function when selecting pin CHxxB (as the input) to pin CHxxA (as the output). Note 3: Output reference level is VCC/2. Note 4: Input transitions prior to the CE falling edge are ignored (don't care). Note 5: Propagation delay differential between any two channels when using a common input signal source. Note 6: Guaranteed by design and not 100% tested.
Timing Diagrams
CHxxA
tPD
tPD
tPD
CHxxB
Figure 1. Digital Channel Propagation Delay
CE
CE
tIS
CHxxA
DON'T CARE
CHxxA
DON'T CARE
tCEZ tCEV CHxxB CHxxB
HIGH IMPEDANCE
HIGH IMPEDANCE
Figure 2. Digital Channels Enabled by CE
Figure 3. Digital Channels Disabled by CE
3
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3.3V 26-Channel, Three-Stateable Transmission Gate DS3690
Typical Operating Characteristics
(VCC = 3.3V, TA = +25C, unless otherwise noted.)
POWER-SUPPLY CURRENT vs. INPUT VOLTAGE
DS3690 toc01
CHANNEL ON-RESISTANCE CHANGE vs. INPUT VOLTAGE
IOUT = -0.1mA, CH1 20 DELTA RESISTANCE ()
DS3690 toc02
1.E-02 1.E-03 SUPPLY CURRENT (A) 1.E-04 1.E-05 1.E-06 1.E-07 1.E-08 1.E-09 1.E-10 2.0 2.3 2.6 2.9 3.2 INPUT VOLTAGE (V) TA = +25C TA = -55C TA = +85C CE = CH1A-CH26A, CH1B-CH26B = FLOAT
25
15
10
5
0 0.0 0.7 1.3 2.0 2.6 3.3 INPUT VOLTAGE (V)
OUTPUT-VOLTAGE HIGH vs. OUTPUT CURRENT
DS3690 toc03
OUTPUT-VOLTAGE LOW vs. OUTPUT CURRENT
VIN = +0.3V, CH1A-CH1B 0.5 OUTPUTVOLTAGE (V) 0.4 0.3 0.2 0.1 0.0
DS3690 toc04
3.2 VIN = +3.0V, CH1A-CH1B 3.1 OUTPUT VOLTAGE (V) 3.0 2.9 2.8 2.7 2.6 -5 -4 -3 -2 -1 0 OUTPUT CURRENT (mA)
0.6
0
1
2
3
4
5
OUTPUT CURRENT (mA)
4
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3.3V 26-Channel, Three-Stateable Transmission Gate
Pin Description
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25, 53 26 27 28 29 NAME CH01A CH02A CH03A CH04A CH05A CH06A CH07A CH08A CH09A CH10A CH11A CH12A CH13A CH14A CH15A CH16A CH17A CH18A CH19A CH20A CH21A CH22A CH23A VCC GND CH23B CH22B CH21B CH20B FUNCTION Channel 1 Terminal A Channel 2 Terminal A Channel 3 Terminal A Channel 4 Terminal A Channel 5 Terminal A Channel 6 Terminal A Channel 7 Terminal A Channel 8 Terminal A Channel 9 Terminal A Channel 10 Terminal A Channel 11 Terminal A Channel 12 Terminal A Channel 13 Terminal A Channel 14 Terminal A Channel 15 Terminal A Channel 16 Terminal A Channel 17 Terminal A Channel 18 Terminal A Channel 19 Terminal A Channel 20 Terminal A Channel 21 Terminal A Channel 22 Terminal A Channel 23 Terminal A Supply Voltage Ground Channel 23 Terminal B Channel 22 Terminal B Channel 21 Terminal B Channel 20 Terminal B PIN 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 54 55 56 -- NAME CH19B CH18B CH17B CH16B CH15B CH14B CH13B CH12B CH11B CH10B CH09B CH08B CH07B CH06B CH05B CH04B CH03B CH02B CH01B CH24B CH25B CH26B CE CH26A CH25A CH24A EP FUNCTION Channel 19 Terminal B Channel 18 Terminal B Channel 17 Terminal B Channel 16 Terminal B Channel 15 Terminal B Channel 14 Terminal B Channel 13 Terminal B Channel 12 Terminal B Channel 11 Terminal B Channel 10 Terminal B Channel 9 Terminal B Channel 8 Terminal B Channel 7 Terminal B Channel 6 Terminal B Channel 5 Terminal B Channel 4 Terminal B Channel 3 Terminal B Channel 2 Terminal B Channel 1 Terminal B Channel 24 Terminal B Channel 25 Terminal B Channel 26 Terminal B Chip-Enable Input (Active Low) Channel 26 Terminal A Channel 25 Terminal A Channel 24 Terminal A Exposed Paddle. Must be connected to ground.
DS3690
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3.3V 26-Channel, Three-Stateable Transmission Gate DS3690
Detailed Description
The DS3690 is a 26-channel, noninverting, bidirectional CMOS transmission gate, and is intended for use in applications where a downstream component must be isolated from a common control, address, or data bus in a timely fashion. Each of the 26 independent channels can be used for input, output, or I/O signal applications. The chip-enable input (CE) allows gated bus control for either signal transmission or bus isolation. Each independent channel consists of two pins ("CHxxA" and "CHxxB" where xx is 01-26). Since all 26 channels are capable of bidirectional function, either CHxxA or CHxxB can be selected as the input pin for any unidirectional signal requirements. A change of logic state on one side of any channel is directly reflected on the other side of that channel. Signal propagation delay (CHxxA to CHxxB, or CHxxB to CHxxA) is illustrated in Figure 1 as tPD. All channels can be simultaneously enabled or forced to a high-impedance state using the CE input. When CE becomes a logic zero, all channels are enabled for signal transmission within tCEV (see Figure 2). When CE becomes a logic one, all channels are forced to a high-impedance state within tCEZ (see Figure 3).
Applications Information
Power-Supply Decoupling
To achieve the best results when using the DS3690, decouple the power supply with a 0.1F capacitor. Use a high-quality, ceramic surface-mount capacitor if possible. Surface-mount components minimize lead inductance, which improves performance, while ceramic capacitors have adequately high-frequency response for decoupling applications.
Pin Connections
For optimum circuit operation, connect pins 25 and 53 to a common ground. The exposed pad on the package bottom side should be connected to ground. To prevent an unused transmission channel from generating any undesired activity, it is recommended that one side of that unused channel be connected to ground (either the A or B terminal, at the designer's discretion).
Typical Operating Circuit
+3.3V R/W CONTROL ADDRESS (A0-X) MICRO I/O (DQ0-X) BUS ENABLE CE R/W CONTROL ADDRESS (A0-X)
DS3690
I/O (DQ0-X)
EXTERNAL MEMORY
6
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3.3V 26-Channel, Three-Stateable Transmission Gate
Functional Diagram Package Information
(For the latest package outline information, go to www.maxim-ic.com/DallasPackInfo.)
VCC VCC CE
DS3690
PACKAGE TYPE 56 TQFN
DOCUMENT NO. 21-0187
CH01A
CH01B
CH02A
CH02B
CH03A
CH03B
GND
CH26A
CH26B
DS3690
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 7
(c) 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.

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